It is specified in compliance with jedec standard no. Bcd to 7segment decodersdrivers general description the 46a and 47a feature activelow outputs designed for driving commonanode leds or incandescent indicators directly. All of the circuits have full rippleblanking inputoutput controls and a lamp test input. Ahighonnoecausestheoutputsto assume a highimpedance off state. This device may be used as a level converter for interfacing ttl or nmos outputs to high. Decodersdrivers the sn5474ls247 thru sn5474ls249 are bcdtosevensegment decoderdrivers. Free download 74244 datasheet, pinouts,circuits,schematic. Operating and storage junction temperature range tj, tstg. The ls247 features a lamp test input and have full rippleblanking inputoutput controls. The 74ahcahct244 is an octal noninverting bufferline driver with 3state outputs. Recommended operating conditions symbol parameter conditions min typ max unit 74hc373 vcc supply voltage 2. Pdf ks54hctls ks74hctls am29823 am29824 5474ls 7tb414s 90xo 14pin.
Data sheet pure storage flasharrayx accelerate core applications and provide a modern data experience. They are specified in compliance with jedec standard no. The 74hc0074hct00 are highspeed sigate cmos devices and are pin compatible with low power schottky ttl lsttl. Gate cmos the mc74hct573a is identical in pinout to the ls573.
Stresses beyond the absolute maximum may result in immediate failure or reduced reliability. Hex d flipflop the lsttlmsi sn5474ls174 is a high speed hex d flipflop. The ls247 has activelow outputs for direct drive of indicators. The ds80c310 is a fully static, cmos, 8051compatible microcontroller designed for high performance. The 3state outputs are controlled by the outputs enable inputs 1oe and. The device features latch enable le and output enable oe inputs. When le is high, data at the inputs enter the latches. Recent listings manufacturer directory get instant. Mc74hct573a octal 3state noninverting transparent latch. Subtraction subtraction can be done by taking the 2s complement of the number to be subtracted, the buz, and adding i register in computer architecture, a processor register is a small amount of storage available on the cpu whose contents. Dm74ls32 quad 2input or gate dm74ls32 quad 2input or gate general description this device contains four independent gates each of which performs the logic or function. The device is used primarily as a 6bit edgetriggered storage register. Static characteristics symbol parameter conditions min typ max unit vcc supply voltage 2.
Cd54hc573, cd74hc573 octal transparent dtype latches with 3state outputs scls454a february 2001 revised april 2003 post office box 655303 dallas, texas 75265 1 2v to 6v vcc operation wide operating temperature range of. Latch transparent 3st 8ch dtype 20pin so bulk online from elcodis, view and download 74hc573d pdf datasheet, logic latches specifications. Chip,iconline,databook,datasheet catalog,datasheet archive. Vishay siliconix package information document number. Mc74hct573a octal 3state noninverting transparent latch with lsttl compatible inputs high. The ls249 is a 16pin version of the 14pin ls49 and includes full functional capability for lamp test and. Dm74ls32 quad 2input or gate physical dimensions inches millimeters unless otherwise noted continued 14lead plastic dualinline package pdip, jedec ms001, 0. In this condition the latches are transparent, a latch output will change each time its corresponding dinput changes. The ls247 and ls248 are functionally and electrically identical to the ls47 and ls48 with the same pinout configuration. Download national semiconductor corporation mm74hc pdf datasheet file. Subtraction subtraction can be done by taking the 2s complement of the number to be subtracted, the buz, and adding i register in computer architecture, a processor register is a small amount of storage available on the cpu whose. Input voltage cannot exceed vcc to the extent the maximum clamp current is exceeded.
Sn74ls247 bcdtosevensegment decodersdrivers the sn74ls247 is a bcdtosevensegment decoderdrivers. M54hc279f1r m74hc279m1r m74hc279b1r m74hc279c1r f1r ceramicpackage m1r micropackage c1r chip carrier pin connectionstop view nc no internal connection. Ks54hctls p o o p o y r ks74hctls, 5 0 ma range ks74hctls. This is a stress rating only and functional operation of the device. These are stress values and device operation should be within recommend values. Specify by appending the suffix letter x to the ordering code. Electronic component search and free download site. The 74ahcahct244 is a highspeed sigate cmos device. In most cases the ds80c310 can drop into an existing socket for the 80c31 or 80c32 to significantly improve the operation. Segment identification and resultant displays are shown on a following page.
Tstg storage temperature range 65 to 150 c tl lead temperature, 1 mm from case for 10 seconds 260 c tj junction temperature under bias 150 c ja thermal resistance soic tssop 125 170 cw pd power dissipation in still air at 85 c soic tssop 500 450 mw msl moisture sensitivity level 1 fr flammability rating oxygen index. Ds80c310 highspeed microcontroller maxim integrated. Pure storage flasharrayx, the worlds first 100% allflash endtoend nvme and nvmeof array, now optionally includes a storage class memory boost to address the most demanding enterprise applications performance requirements. Recommended operating conditions symbol parameter value unit vcc supply voltage 2 to 6 v vi input voltage 0 to vcc v vo output voltage 0 to vcc v top operating temperature. In general, software written for existing 8051based systems works without modification on the ds80c310. The 74hc0074hct00 provide the 2input nand function. Tstg storage temperature 65 +150 c ptot total power dissipation tamb 40 c to +125 c so16 package 1 500 mw. Vishay, disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. If its not shown correctly, click here to open the file on a separate window. National semiconductor corporation mm74hc datasheet. Chip,iconline,databook, datasheet catalog, datasheet archive.
The information on the d inputs is transferred to storage during the low to high clock transition. Tip140, tip141, tip142, tip145, tip146, tip147 darlington. The 3state outputs are controlled by the outputs enable inputs 1oe and 2oe. Functional operation above the recommended operating conditions is not implied.